LT11743 [Linear Systems]
High Efficiency Step-Down Switching Regulator Controllers; 高效率降压型开关稳压控制器
| 型号： | LT11743 |
| 厂家： | 
Linear Systems |
| 描述： | High Efficiency Step-Down Switching Regulator Controllers |
| 文件： | 总16页 (文件大小：218K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1147-3.3
LTC1147-5/LTC1147L
High Efficiency Step-Down
Switching Regulator Controllers
U
DESCRIPTIO
FEATURES
The LTC®1147 series are step-down switching regulator
■
Very High Efficiency: Over 95% Possible
■
Wide VIN Range: 3.5V* to 16V
controllers featuring automatic Burst ModeTM operation to
■
Current Mode Operation for Excellent Line and Load
Transient Response
High Efficiency Maintained Over Three Decades of
Output Current
maintain high efficiencies at low output currents. These
devices drive an external P-channel power MOSFET at
switchingfrequenciesexceeding400kHzusingaconstant
off-time current mode architecture providing constant
ripple current in the inductor.
■
■
■
■
■
■
■
■
Low 160µA Standby Current at Light Loads
Logic Controlled Micropower Shutdown: IQ < 20µA
Short-Circuit Protection
Very Low Dropout Operation: 100% Duty Cycle
High Efficiency in a Small Amount of Board Space
Output Can Be Externally Held High in Shutdown
Available in 8-Pin SO Package
The operating current level is user-programmable via an
external current sense resistor. Wide input supply range
allows operation from 3.5V* to 14V (16V maximum).
Constantoff-timearchitectureprovideslowdropoutregu-
lation limited by only the RDS(ON) of the external MOSFET
and resistance of the inductor and current sense resistor.
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The LTC1147 series incorporates automatic power saving
Burst Mode operation to reduce switching losses when
load currents drop below the level required for continuous
operation. Standby power is reduced to only 2mW at
VIN = 10V (at IOUT = 0). Load currents in Burst Mode
operation are typically 0mA to 300mA.
APPLICATIO S
■
Notebook and Palmtop Computers
■
Portable Instruments
■
Battery-Operated Digital Devices
■
Cellular Telephones
■
DC Power Distribution Systems
For applications where even higher efficiency is required,
refer to the LTC1148 data sheet and Application Note 54.
■
GPS Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Modeis a trademark of Linear Technology Corporation.
*LTC1147L and LTC1147L-3.3 only.
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O
TYPICAL APPLICATI
LTC1147-5 Efficiency
V
IN
(5.2V TO 14V)
100
+
+
C
IN
100µF
1µF
V
95
90
85
80
75
70
IN
P-CHANNEL
Si4431DY
V
= 6V
IN
PDRIVE
LTC1147-5
SHDN
L*
R
**
SENSE
50µH
0.05Ω
V
OUT
0V = NORMAL
5V/2A
>1.5V = SHUTDOWN
V
= 10V
IN
+
SENSE
1000pF
I
C
TH
–
SENSE
+
T
C
R
C
OUT
390µF
1k
D1
MBRD330
C
T
GND
470pF
C
C
3300pF
LT1147 • F01
*COILTRONICS CTX50-2-MP
**KRL SL-1-C1-0R050J
0.001
0.01
0.1
1
LOAD CURRENT (A)
LT1147 • TA01
Figure 1. High Efficiency Step-Down Converter
sn1147 1147fds
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LTC1147-3.3
LTC1147-5/LTC1147L
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ABSOLUTE AXI U RATI GS
Input Supply Voltage (Pin 1) .................... 16V to –0.3V
Continuous Output Current (Pin 8) ...................... 50mA
Sense Voltages (Pins 4, 5)
Operating Ambient Temperature Range
LTC1147C ............................................... 0°C to 70°C
LTC1147I............................................. –40°C to 85°C
Extended Commercial
VIN ≥ 12.7V ...........................................13V to –0.3V
VIN < 12.7V............................... (VIN + 0.3V) to –0.3V
Temperature Range (Note 4) ................. –40°C to 85°C
Junction Temperature (Note 1)............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
ORDER PART NUMBER
S8 PART MARKING
V
1
2
3
4
PDRIVE
8
7
6
5
IN
LTC1147CN8-3.3
LTC1147CN8-5
LTC1147CS8-3.3
LTC1147CS8-5
LTC1147IS8-3.3
LTC1147IS8-5
LTC1147LCS8
LTC1147LCS8-3.3
LTC1147LIS8
11473
11475
1147I3
1147I5
1147L
1147L3
1147LI
C
GND
SHDN
T
I
TH
–
(V *)
SENSE
FB
+
SENSE
N8 PACKAGE
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SO
* ADJUSTABLE OUTPUT VERSION
S8 PACKAGE
TJMAX = 125°C, θJA = 110°C/W (N)
TJMAX = 125°C, θJA = 150°C/W (S)
Consult factory for Military grade parts.
TA = 25°C, VIN = 10V, VSHDN = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
1.25
0.2
MAX
1.29
1
UNITS
V
V
6
Feedback Voltage (LTC1147L)
Feedback Current (LTC1147L)
V
IN
= 9V
●
●
1.21
I
µA
6
V
OUT
Regulated Output Voltage
LTC1147-3.3, LTC1147L-3.3
LTC1147-5
V
= 9V
= 700mA
= 700mA
IN
I
I
●
●
3.23
4.90
3.33
5.05
3.43
5.20
V
V
LOAD
LOAD
∆V
Output Voltage Line Regulation
V
IN
= 7V to 12V, I = 50mA
LOAD
–40
0
40
mV
OUT
Output Voltage Load Regulation
LTC1147-3.3, LTC1147L-3.3
LTC1147-5
5mA < I
5mA < I
< 2A
< 2A
●
●
40
60
65
100
mV
mV
LOAD
LOAD
Burst Mode Output Ripple
I
= 0A
50
mV
P-P
LOAD
I
Input DC Supply Current (Note 2)
LTC1147 Series
(Note 5)
Q
Normal Mode
4V < V < 12V
1.6
160
160
10
2.1
230
230
20
mA
µA
µA
µA
IN
Sleep Mode
Sleep Mode (LTC1147-5)
Shutdown
4V < V < 12V
IN
5V < V < 12V
IN
V
SHDN
= 2.1V, 4V < V < 12V
IN
LTC1147L Series
Normal Mode
3.5V < V < 12V
1.6
160
10
2.1
230
20
mA
µA
µA
IN
Sleep Mode
3.5V < V < 12V
IN
Shutdown (LTC1147L-3.3)
V
= 2.1V, 3.5V < V < 12V
SHDN IN
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LTC1147-3.3
LTC1147-5/LTC1147L
ELECTRICAL CHARACTERISTICS
TA = 25°C, VIN = 10V, VSHDN = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS MIN TYP
MAX
UNITS
V – V
5
Current Sense Threshold Voltage (Note 6)
LTC1147-3.3, LTC1147L-3.3
4
–
–
–
–
–
–
V
V
V
V
V
V
= V
= V
= V
= V
+ 100mV (Forced)
– 100mV (Forced)
+ 100mV (Forced)
– 100mV (Forced)
25
150
25
150
25
150
mV
mV
mV
mV
mV
mV
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
OUT
OUT
OUT
OUT
130
130
130
170
170
170
LTC1147–5
LTC1147L
= 5V, V6 = V /4 + 25mV (Forced)
OUT
OUT
= 5V, V6 = V /4 – 25mV (Forced)
V
SHDN Pin Threshold
6
LTC1147-3.3/LTC1147-5/LTC1147L-3.3
0.5
0.8
1.2
2
5
V
I
I
t
SHDN Pin Input Current
LTC1147-3.3/LTC1147-5/LTC1147L-3.3
6
0V < V
< 8V, V = 16V
µA
SHDN
IN
–
C Pin Discharge Current
T
V
V
in Regulation, V
= 0V
= V
OUT
50
4
70
2
90
10
µA
µA
2
OUT
OUT
SENSE
Off-Time (Note 3)
C = 390pF, I = 700mA
T LOAD
5
6
µs
OFF
t , t
r
Driver Output Transition Times
C = 3000pF (Pin 8), V = 6V
100
200
ns
f
L
IN
–40°C ≤ TA ≤ 85°C (Note 4), VIN = 10V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Feedback Voltage (LTC1147L)
V
V
= 9V
= 9V
= 700mA
= 700mA
●
1.20
1.25
1.30
V
6
IN
Regulated Output Voltage
LTC1147-3.3/LTC1147L-3.3
LTC1147-5
OUT
IN
I
I
●
●
3.17
4.85
3.33
5.05
3.43
5.20
V
V
LOAD
LOAD
I
Input DC Supply Current (Note 2)
LTC1147 Series
(Note 5)
Q
Normal Mode
4V < V < 12V
1.6
160
160
10
2.4
260
260
22
mA
µA
µA
µA
IN
Sleep Mode
Sleep Mode (LTC1147-5)
Shutdown
4V < V < 12V
IN
5V < V < 12V
IN
V
= 2.1V, 4V < V < 12V
SHDN
IN
LTC1147L Series
Normal Mode
3.5V < V < 12V
1.6
160
10
2.4
260
22
mA
µA
µA
IN
Sleep Mode
3.5V < V < 12V
IN
Shutdown (LTC1147L-3.3)
V
= 2.1V, 3.5V < V < 12V
SHDN
IN
V – V
5
Current Sense Threshold Voltage (Note 6)
LTC1147-3.3
4
–
V
V
V
V
V
V
= V
= V
= V
= V
+ 100mV (Forced)
25
150
25
150
25
150
mV
mV
mV
mV
mV
mV
SENSE
SENSE
SENSE
SENSE
SENSE
SENSE
OUT
OUT
OUT
OUT
–
–
–
–
–
– 100mV (Forced)
+ 100mV (Forced)
– 100mV (Forced)
●
●
125
125
125
185
185
185
LTC1147-5
LTC1147L
= 5V, 6V = V /4 + 25mV (Forced)
OUT
= 5V, 6V = V /4 – 25mV (Forced)
OUT
V
SHDN Pin Threshold
6
LTC1147-3.3/LTC1147-5/LTC1147L-3.3
0V < V
< 8V, V = 16V
0.5
3.8
0.8
5
2
V
SHDN
IN
t
Off-Time (Note 3)
C = 390pF, I = 700mA
T LOAD
6.5
µs
OFF
The
temperature range.
Note 1: T is calculated from the ambient temperature T and power
●
denotes specifications which apply over the full specified
Note 3: In applications where R
time increases approximately 40%.
Note 4: The LTC1147C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and 85°C. The
LTC1147I is guaranteed to meet the extended temperature limits.
is placed at ground potential, the off-
SENSE
J
A
dissipation P according to the following formulas:
D
LTC1147CN8-3.3/LTC1147CN8-5: T = T + (P )(110°C/W)
J
A
D
LTC1147LIS/LTC1147IS8/LTC1147LCS/
LTC1147CS8-3.3/LTC1147CS8-5: T = T + (P )(150°C/W)
J
A
D
Note 5: The LTC1147L/LTC1147L-3.3 allow operation to V = 3.5V.
IN
Note 2: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: The LTC1147L is tested with external feedback resistors resulting
in a nominal output voltage of 2.5V.
sn1147 1147fds
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LTC1147-3.3
LTC1147-5/LTC1147L
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TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage
Line Regulation
Load Regulation
100
98
96
94
92
90
88
86
84
82
80
40
30
20
0
FIGURE 1 CIRCUIT
FIGURE 1 CIRCUIT
FIGURE 1 CIRCUIT
SENSE
I
= 1A
LOAD
R
= 0.05Ω
20
–20
–40
I
= 1A
LOAD
V
IN
= 6V
10
0
–10
–20
–30
–40
V
IN
= 12V
I
= 100mA
LOAD
–60
–80
–100
0
4
8
12
16
8
12
0
0.5
1.0
LOAD CURRENT (A)
1.5
2.0
2.5
0
4
16
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
LTC1147 • G01
LTC1147 • G03
LTC1147 • G02
Operating Frequency
vs (VIN – VOUT
DC Supply Current
Supply Current in Shutdown
)
2.1
20
18
16
14
12
10
8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
NOT INCLUDING
GATE CHARGE CURRENT
V
= 2V
SHUTDOWN
V
= 5V
OUT
(NOT AVAILABLE ON LTC1147L)
1.8
1.5
1.2
0.9
0.6
0.3
0°C
ACTIVE MODE
70°C
25°C
6
4
SLEEP MODE
2
0
0
0
0
2
4
6
8
10 12
INPUT VOLTAGE (V)
14 16
18
0
2
4
6
8
10
12
0
2
6
8
10 12 14 16 18
4
INPUT VOLTAGE (V)
(V – V ) VOLTAGE (V)
IN
OUT
LTC1147 • G05
LTC1148 • G06
LTC1147 • G04
Gate Charge Supply Current
Current Sense Threshold Voltage
Off-Time vs VOUT
14
12
10
8
175
150
125
100
75
80
70
60
50
40
30
20
10
0
–
MAXIMUM
THRESHOLD
V
= V
OUT
SENSE
Q
= 50nC
P
6
4
50
MINIMUM
THRESHOLD
Q
= 29nC
P
2
25
LTC1147-5
3
LTC1147-3.3
0
0
20
80
140
200
260
0
20
40
60
80
100
2
0
1
4
5
OPERATING FREQUENCY (kHz)
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
LTC1147 • G09
LTC1147 • G07
LTC1147 • G08
sn1147 1147fds
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LTC1147-3.3
LTC1147-5/LTC1147L
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PI FU CTIO S
VIN (Pin 1): Main Supply Pin. Must be closely decoupled
SHDN/VFB (Pin 6): When grounded, the fixed output
versions of the LTC1147 family operate normally. Pulling
Pin 6 high holds the P-channel MOSFET off and puts the
LTC1147inmicropowershutdownmode.RequiresCMOS
logic signal with tr, tf < 1µs. Do not leave this pin floating.
On the LTC1147L this pin serves as the feedback pin from
an external resistive divider used to set the output voltage.
to ground Pin 7.
CT (Pin2):ExternalcapacitorCT fromPin2togroundsets
the operating frequency. The actual frequency is also
dependent upon the input voltage.
I
TH (Pin 3): Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 3 voltage.
GND (Pin 7): Two independent ground lines must be
routedseparatelyto:1)the(–)terminalofCOUT, and2)the
cathode of the Schottky diode and (–) terminal of CIN.
SENSE– (Pin 4): Connects to internal resistive divider
whichsetstheoutputvoltage. Pin4isalsothe(–)inputfor
the current comparator.
SENSE+ (Pin 5): The (+) input to the current comparator.
A built-in offset between Pins 4 and 5 in conjunction with
RSENSE sets the current trip threshold.
PDRIVE (Pin 8): High current drive for the P-channel
MOSFET. Voltage swing at this pin is from VIN to ground.
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Pin 6 Connection Shown For LTC1147-3.3 and LTC1147-5; Changes Create LTC1147L.
FU CTIO AL DIAGRA
+
–
SENSE
5
SENSE
4
V
1
8
7
IN
V
FB
PDRIVE
GND
6
–
+
V
SLEEP
–
25mV TO 150mV
R
C
Q
+
+
–
S
5pF
+
S
V
OS
–
–
+
–
V
TH2
V
TH1
13k
T
I
3
G
TH
+
1.25V
100k
V
IN
OFF-TIME
CONTROL
REFERENCE
2
SHDN 6
–
SENSE
C
T
LTC1147 • FD
sn1147 1147fds
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LTC1147-3.3
LTC1147-5/LTC1147L
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(Refer to Functional Diagram)
OPERATIO
The LTC1147 series uses a current mode, constant off-
time architecture to switch an external P-channel power
MOSFET.Operatingfrequencyissetbyanexternalcapaci-
tor at CT (Pin 2).
(Pin 3) to increase the current comparator threshold, thus
tracking the load current.
The sequence of events for Burst Mode operation is very
similar to continuous operation with the cycle interrupted
by the voltage comparator. When the output voltage is at
or above the desired regulated value, the P-channel MOS-
FET is held off by comparator V and the timing capacitor
continues to discharge below VTH1. When the timing
capacitor discharges past VTH2, voltage comparator S
trips, causing the internal sleep line to go low.
The output voltage is sensed by an internal voltage divider
connectedtoSENSE– (Pin4). AvoltagecomparatorV, and
a gain block G, compare the divided output voltage with a
reference voltage of 1.25V. To optimize efficiency, the
LTC1147seriesautomaticallyswitchsbetweentwomodes
of operation, burst and continuous. The voltage compara-
tor is the primary control element when the device is in
Burst Mode operation, while the gain block controls the
output voltage in continuous mode.
The circuit now enters sleep mode with the power MOS-
FET turned off. In sleep mode, a majority of the circuitry is
turned off, dropping the quiescent current from 1.6mA to
160µA. The load current is now being supplied from the
outputcapacitor. Whentheoutputvoltagehasdroppedby
the amount of hysteresis in comparator V, the P-channel
MOSFET is again turned on and this process repeats.
During the switch “on” cycle in continuous mode, current
comparator C monitors the voltage between Pins 4 and 5
connected across an external shunt in series with the
inductor. When the voltage across the shunt reaches its
threshold value, the PDRIVE output is switched to VIN,
turning off the P-channel MOSFET. The timing capacitor
connected to Pin 2 is now allowed to discharge at a rate
determined by the off-time controller. The discharge cur-
rent is made proportional to the output voltage (measured
by Pin 4) to model the inductor current, which decays at
a rate which is also proportional to the output voltage.
To avoid the operation of the current loop interfering with
Burst Mode operation, a built-in offset VOS is incorporated
in the gain stage. This prevents the current comparator
threshold from increasing until the output voltage has
dropped below a minimum threshold.
Using constant off-time architecture, the operating fre-
quency is a function of the input voltage. To minimize the
frequencyvariationasdropoutisapproached, theoff-time
controller increases the discharge current as VIN drops
below VOUT + 1.5V. In dropout the P-channel MOSFET is
turned on continuously (100% duty cycle), providing low
dropout operation with VOUT ≈ VIN.
When the voltage on the timing capacitor has discharged
past VTH1, comparator T trips, setting the flip-flop. This
causesthePDRIVEoutputtogolowturningtheP-channel
MOSFET back on. The cycle then repeats.
As the load current increases, the output voltage de-
creases slightly. This causes the output of the gain stage
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APPLICATIO S I FOR ATIO
LTC1147L Adjustable Applications
To prevent stray pickup a 100pF capacitor is suggested
across R1 located close to the LTC1147L.
When an output voltage other than 3.3V or 5V is required,
the LTC1147L adjustable version is used with an external
resistive divider from VOUT to VFB (Pin 6) (see Figure 7).
The regulated voltage is determined by:
For Figure 1 applications with VOUT below 2V, or when
RSENSE ismovedtoground, thecurrentsense comparator
inputsoperatenear ground.Whenthecurrentcomparator
is operated at less than 2V common mode, the off-time
increases approximately 40%, requiring the use of a
smaller timing capacitor CT.
R2
R1
1 +
= 1.25
V
OUT
)
)
sn1147 1147fds
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LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
0.20
0.15
0.10
0.05
0
The basic LTC1147 application circuit is shown in Figure
1. External component selection is driven by the load
requirementandbeginswiththeselectionofRSENSE.Once
RSENSE is known, CT and L can be chosen. Next, the power
MOSFET and D1 are selected. Finally, CIN and COUT are
selected and the loop is compensated. The circuit shown
in Figure 1 can be configured for operation up to an input
voltage of 16V. If the application requires higher input
voltage, then the synchronous switched LTC1149 should
be used. Consult factory for lower minimum input voltage
version.
0
1
2
3
4
5
MAXIMUM OUTPUT CURRENT (A)
LTC1147 • F02
RSENSE Selection for Output Current
Figure 2. Selecting RSENSE
R
is chosen based on the required output current.
SENSE
The LTC1147 series current comparator has a thresh-
old range which extends from a minimum of 25mV/
The LTC1147 series automatically extend tOFF during a
short circuit to allow sufficient time for the inductor
current to decay between switch cycles. The resulting
ripple current causes the average short-circuit current
R
SENSE
to a maximum of 150mV/R
. The current
SENSE
comparator threshold sets the peak of the inductor
ripple current, yielding a maximum output current I
MAX
ISC(AVG) to be reduced to approximately IMAX.
equal to the peak value less half the peak-to-peak ripple
current. For proper Burst Mode operation, I
RIPPLE(P-P)
L and CT Selection for Operating Frequency
must be less than or equal to the minimum current
comparator threshold.
The LTC1147 series use a constant off-time architecture
with tOFF determined by an external timing capacitor CT.
Each time the P-channel MOSFET switch turns on, the
voltage on CT is reset to approximately 3.3V. During the
off-time, CT is discharged by a current which is propor-
tional to VOUT. The voltage on CT is analogous to the
current in inductor L, which likewise decays at a rate
proportional to VOUT. Thus the inductor value must track
the timing capacitor value.
Since efficiency generally increases with ripple current,
the maximum allowable ripple current is assumed, i.e.,
IRIPPLE(P-P) = 25mV/RSENSE (see CT and L Selection for
Operating Frequency). Solving for RSENSE and allowing
a margin for variations in the LTC1147 series and
external component values yields:
100mV
MAX
R
=
SENSE
I
The value of CT is calculated from the desired continuous
mode operating frequency:
A graph for selecting RSENSE versus maximum output
current is given in Figure 2.
V – V
1
IN
OUT
C =
T
)
)
4
The load current below in which Burst Mode operation
commences, IBURST and the peak short-circuit current
ISC(PK), both track IMAX. Once RSENSE has been chosen,
IBURST and ISC(PK) can be predicted from the following:
V + V
(1.3)(10 )(f)
IN
D
Where VD is the drop across the Schottky diode.
A graph for selecting CT versus frequency including the
effects of input voltage is given in Figure 3.
15mV
SENSE
I
≈
BURST
R
As the operating frequency is increased the gate charge
losses will reduce efficiency (see Efficiency Consider-
ations). The complete expression for operating frequency
sn1147 1147fds
150mV
SENSE
I
=
SC(PK)
R
7
LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
1000
–
series will delay entering Burst Mode operation and effi-
ciency will be degraded at low currents.
V
= V
= 5V
OUT
SENSE
800
600
Inductor Core Selection
Once the minimum value for L is known, the type of
inductor must be selected. Highest efficiency will be
obtained using ferrite, Kool Mµ® (from Magnetics, Inc.) or
molypermalloy (MPP) cores. Lower cost powdered iron
cores provide suitable performance but cut efficiency by
3% to 5%. Actual core loss is independent of core size for
a fixed inductor value, but it is very dependent on induc-
tance selected. As inductance increases, core losses go
down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
400
V
= 12V
IN
200
0
V
= 7V
IN
V
= 10V
IN
0
200
FREQUENCY (kHz)
300
100
LTC1147 • F03
Figure 3. Timing Capacitor Value
is given by:
Ferrite designs have very low core loss, so design goals
can concentrate on copper loss and preventing satura-
tion.Ferritecorematerialsaturates“hard,”whichmeans
thatinductancecollapsesabruptlywhenthepeakdesign
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple which can cause Burst Mode operation to be
falsely triggered in the LTC1147. Do not allow the core
to saturate!
V
OUT
1
f ≈
1 –
)
)
t
V
OFF
IN
where:
V
V
REG
OUT
4
t
= (1.3)(10 )(C )
T
OFF
)
)
VREG is the desired output voltage (i.e., 5V, 3.3V). VOUT is
the measured output voltage. Thus VREG/VOUT = 1 in
regulation.
Kool Mµ is a very good, low loss core material for toroids
with a “soft” saturation characteristic. Molypermalloy is
slightly more efficient at high (>200kHz) switching fre-
quencies but quite a bit more expensive. Toroids are very
space efficient, especially when you can use several
layers of wire. Because they generally lack a bobbin,
mounting is more difficult. However, new designs for
surfacemountareavailablefromCoiltronics, Sumidaand
Beckman Industrial Corp. which do not increase the
height significantly.
Note that as V decreases, the frequency decreases.
IN
When the input to output voltage differential drops
below1.5V,theLTC1147reducest byincreasingthe
OFF
discharge current in C . This prevents audible opera-
T
tion prior to dropout.
Once the frequency has been set by C , the inductor L
must be chosen to provide no more than 25mV/R
T
SENSE
of peak-to-peak inductor ripple current. This results in
a minimum required inductor value of:
Power MOSFET Selection
An external P-channel power MOSFET must be selected
for use with the LTC1147 series. The main selection
criteria for the power MOSFET are the threshold voltage
5
L
MIN
= (5.1)(10 )(R
)(C )(V
)
SENSE
T
REG
As the inductor value is increased from the minimum
value, the ESR requirements for the output capacitor
are eased at the expense of efficiency. If too small an
inductor is used, the inductor current will become
discontinuous before the LTC1147 series enters Burst
Modeoperation.AconsequenceofthisisthattheLTC1147
V
GS(TH) and “on” resistance RDS(ON).
The minimum input voltage determines whether a stan-
dard threshold or logic-level threshold MOSFET must be
Kool Mµ is a registered trademark of Magnetics, Inc.
sn1147 1147fds
8
LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
used.ForVIN >8V,astandardthresholdMOSFET(VGS(TH)
< 4V) may be used. If VIN is expected to drop below 8V,
a logic-level threshold MOSFET (VGS(TH) < 2.5V) is
strongly recommended. When a logic-level MOSFET is
used, the LTC1147 supply voltage must be less than the
absolute maximum VGS ratings for the MOSFET.
(V – V
+ V )
D
IN
OUT
I
=
(I
)
D1
LOAD
V
IN
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Checklist) to avoid ringing
and increased dissipation.
ThemaximumoutputcurrentIMAX determinestheRDS(ON)
requirement for the power MOSFET. When the LTC1147
series is operating in continuous mode, the simplifying
assumption can be made that either the MOSFET or
Schottky diode is always conducting the average load
current. The duty cycles for the MOSFET and diode are
given by:
The forward voltage drop allowable in the diode is calcu-
lated from the maximum short-circuit current as:
P
D
V ≈
F
I
SC(PK)
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements
(see Efficiency Considerations).
V
V
OUT
P-Ch Duty Cycle =
IN
CIN and COUT Selection
(V – V
+ V )
D
IN
OUT
Schottky Diode Duty Cycle =
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle VOUT/VIN. To
prevent large voltage transients, a low ESR input capaci-
torsizedforthemaximumRMScurrentmustbeused.The
maximum RMS capacitor current is given by:
V
From the duty cycle the required RDS(ON) for the MOSFET
can be derived:
(V )(P )
IN
P
P-Ch R
=
DS(ON)
2
1/2
(V )(I
)(1 + δ )
[V (V – V )]
OUT MAX
P
OUT IN
OUT
C Required I
≈ I
MAX
IN
RMS
V
where PP is the allowable power dissipation and δP is the
temperature dependency of RDS(ON). PP will be deter-
mined by efficiency and/or thermal requirements (see
Efficiency Considerations). (1 + δ) is generally given for a
MOSFET in the form of a normalized RDS(ON) vs tempera-
ture curve, but δ = 0.007/°C can be used as an approxima-
tion for low voltage MOSFETs.
IN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monly used for design because even significant devia-
tions do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
only 2000 hours of life. This makes it advisable to further
derate the capacitor, or to choose a capacitor rated at a
higher temperature than required. Several capacitors
may also be paralleled to meet size or height require-
ments in the design. Always consult the manufacturer if
there is any question. An additional 0.1µF to 1µF ceramic
decoupling capacitor is also required on VIN (Pin 1) for
high frequency decoupling.
Output Diode Selection (D1)
The Schottky diode D1 shown in Figure 1 only conducts
during the off-time. It is important to adequately specify
the diode peak current and average power dissipation so
as not to exceed the diode ratings.
The most stressful condition for the output diode is under
short circuit (VOUT = 0V). Under this condition the diode
must safely handle ISC(PK) at close to 100% duty cycle.
Under normal load conditions the average current con-
ducted by the diode is:
The selection of COUT is driven by the required effective
series resistance (ESR). The ESR of COUT must be less
than twice the value of RSENSE for proper operation of the
LTC1147:
COUT Required ESR < 2RSENSE
sn1147 1147fds
9
LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
Optimum efficiency is obtained by making the ESR equal
to RSENSE. As the ESR is increased up to 2RSENSE, the
efficiency degrades by less than 1%. If the ESR is greater
than 2RSENSE, the voltage ripple on the output capacitor
willprematurelytriggerBurstMode operation,resultingin
disruption of continuous mode and an efficiency hit which
can be several percent.
mode (see Figure 4). When COUT is made too small, the
outputrippleatlowfrequencieswillbelargeenoughtotrip
the voltage comparator. This causes Burst Modeopera-
tion to be activated when the LTC1147 series would
normally be in continuous operation. The effect is most
pronounced with low values of RSENSE and can be im-
proved by operating at higher frequencies with lower
values of L. The output remains in regulation at all times.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
fromSanyohasthelowestESR/sizeratioofanyaluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, VOUT shifts by an
amount equal to ∆ILOAD(ESR), where ESR is the effec-
tive series resistance of COUT. ∆ILOAD also begins to
chargeordischargeCOUT untiltheregulatorloopadapts
to the current change and returns VOUT to its steady
state value. During this recovery time VOUT can be
monitored for overshoot or ringing which would indi-
cateastabilityproblem.Theexternalcomponentsshown
in the Figure 1 circuit will prove adequate compensation
for most applications.
In surface mount applications multiple capacitors may
havetobeparalleledtomeetthecapacitance,ESRorRMS
current handling requirements of the application. Alumi-
num electrolytic and dry tantalum capacitors are both
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice
is the AVX TPS series of surface mount tantalums, avail-
able in case heights ranging from 2mm to 4mm. For
example, if 200µF/10V is called for in an application
requiring 3mm height, two AVX 100µF/10V (P/N TPSD
107K010) could be used. Consult the manufacturer for
other specific recommendations.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in par-
allelwithCOUT,causingarapiddropinVOUT.Noregulator
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive so
that the load rise time is limited to approximately
(25)CLOAD. Thus a 10µF capacitor would require a 250µs
rise time, limiting the charging current to about 200mA.
At low supply voltages, a minimum capacitance at COUT is
needed to prevent an abnormal low frequency operating
1000
L = 50µH
SENSE
R
= 0.02Ω
800
600
400
200
0
L = 25µH
SENSE
Efficiency Considerations
R
= 0.02Ω
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
L = 50µH
SENSE
R
= 0.05Ω
0
1
2
3
4
5
(V – V ) VOLTAGE (V)
IN
OUT
LTC1147 • F04
%Efficiency = 100% – (L1 + L2 + L3 + ...)
Figure 4. Minimum Value of COUT
sn1147 1147fds
10
LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
where L1, L2, etc., are the individual losses as a percent-
age of input power. (For high efficiency circuits only small
errors are incurred by expressing losses as a percentage
of output power.)
P-channel and Schottky diode. The MOSFET RDS(ON)
multipliedbythe P-channeldutycyclecanbesummed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if RDS(ON) = 0.1Ω, RL = 0.15Ω,
and RSENSE = 0.05Ω, then the total resistance is 0.3Ω
at VIN ≈ 2VOUT. This results in losses ranging from 3%
to 10% as the output current increases from 0.5A to
2A. I2R losses cause the efficiency to roll off at high
output currents.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1147 circuits: 1) LTC1147 DC bias current,
2) MOSFET gate charge current, 3) I2R losses, and 4)
voltage drop of the Schottky diode.
4. The Schottky diode is a major source of power loss at
high currents and gets worse at high input voltages.
The diode loss is calculated by multiplying the forward
voltage drop times the Schottky diode duty cycle
multiplied by the load current. For example, assuming
a duty cycle of 50% with a Schottky diode forward
voltage drop of 0.4V, the loss increases from 0.5% to
8% as the load current increases from 0.5A to 2A.
1. The DC supply current is the current which flows into
VIN (Pin 1) less the gate charge current. For VIN = 10V
theLTC1147seriesDCsupplycurrentis160µAforno
load, and increases proportionally with load up to a
constant 1.6mA after the LTC1147 series has entered
continuous mode. Because the DC bias current is
drawn from VIN, the resulting loss increases with
input voltage. For VIN = 10V the DC bias losses are
generally less than 1% for load currents over 30mA.
However,atverylowloadcurrentstheDCbiascurrent
accounts for nearly all of the loss.
Figure 5 shows how the efficiency losses in a typical
LTC1147 series regulator end up being apportioned.
Thegatechargelossisresponsibleforthemajorityof
the efficiency lost in the midcurrent region. If Burst
Mode operation was not employed at low currents,
the gate charge loss alone would cause efficiency to
drop to unacceptable levels. With Burst Modeopera-
tion, the DC supply current represents the lone (and
unavoidable) loss component which continues to
become a higher percentage as output current is
reduced. As expected, the I2R losses and Schottky
diode loss dominate at high load currents.
2. MOSFET gate charge current results from switching
thegatecapacitanceofthepowerMOSFET. Eachtime
a MOSFET gate is switched from low to high to low
again, a packet of charge dQ moves from VIN to
ground. The resulting dQ/dt is a current out of VIN
which is typically much larger than the DC supply
current. In continuous mode, IGATECHG = f(QP). The
typical gate charge for a 0.135Ω P-channel power
MOSFET is 40nC. This results in IGATECHG = 4mA in
100kHz continuous operation for a 2% to 3% typical
midcurrent loss with VIN = 10V.
100
2
I R
GATE CHARGE
Note that the gate charge loss increases directly with
both input voltage and operating frequency. This is the
principal reason why the highest efficiency circuits
operate at moderate frequencies. Furthermore, it ar-
gues against using a larger MOSFET than necessary to
control I2R losses, since overkill can cost efficiency as
well as money!
95
LTC1147 I
Q
SCHOTTKY
90
DIODE
85
3. I2R losses are easily predicted from the DC resis-
tances of the MOSFET, inductor and current shunt. In
continuous mode the average output current flows
through L and RSENSE, but is “chopped” between the
80
0.01
0.03
0.1
0.3
1
3
OUTPUT CURRENT (A)
LTC1147 • F05
Figure 5. Efficiency Loss
sn1147 1147fds
11
LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
Other losses including CIN and COUT ESR dissipative
losses,MOSFETswitchinglosses,andinductorcorelosses,
generally account for less than 2% total additional loss.
1
3.3
4.5
f
=
= 102kHz
1 –
MIN
)
)
2.61µs
2
3.3(0.125Ω)(1A) (1.27)
Design Example
P =
= 116mW
P
4.5
As a design example, assume VIN = 5V (nominal), VOUT
=
This last step is necessary to assure that the power
dissipation and junction temperature of the P-channel are
not exceeded.
3.3V, IMAX = 1A, and f = 130kHz; RSENSE, CT and L can
immediately be calculated:
RSENSE = 100mV/1A = 0.1Ω
Troubleshooting Hints
tOFF = (1/130kHz)[1 – (3.3/5)] = 2.61µs
CT = 2.61µs/(1.3)(104) = 220pF
Since efficiency is critical to LTC1147 series applications,
it is very important to verify that the circuit is functioning
correctly in both continuous and Burst Mode operation.
The waveform to monitor is the voltage on the timing
capacitor Pin 2.
L = (5.1)(105)(0.1Ω)(220pF)(3.3V) = 33µH
Assume that the MOSFET dissipation is to be limited to
PP = 250mW.
If TA = 50°C and the thermal resistance of the MOSFET is
50°C/W, then the junction temperatures will be 63°C and
δP = 0.007(63 – 25) = 0.27. The required RDS(ON) for the
MOSFET can now be calculated:
In continuous mode (ILOAD > IBURST) the voltage on the CT
pin should be a sawtooth with a 0.9VP-P swing. This
voltage should never dip below 2V as shown in Figure 6a.
When load currents are low (ILOAD < IBURST) Burst Mode
operation occurs. The voltage on the CT pin now falls to
ground for periods of time as shown in Figure 6b. During
this time the LTC1147 series are in sleep mode with the
quiescent current reduced to 160µA.
5(0.25)
3.3(1) (1.27)
P-Ch R
=
= 0.3Ω
DS(ON)
2
The P-channel requirement can be met by a Si9430DY.
Note that the most stringent requirement for the Schottky
diode is with VOUT = 0 (i.e., short circuit). During a
continuous short circuit, the worst-case Schottky diode
dissipation rises to:
The inductor current should also be monitored. Look to
verify that the peak-to-peak ripple current in continuous
mode operation is approximately the same as in Burst
Modeoperation.
P = I
(V )
D
D
SC(AVG)
3.3V
With the 0.1Ω sense resistor ISC(AVG) = 1A will result,
0V
increasing the 0.4V Schottky diode dissipation to 0.4W.
Figure 6a. Continuous Mode Operation CT Waveform
CIN will require an RMS current rating of at least 0.5A at
temperature, and COUT will require an ESR of 0.1Ω for
optimum efficiency.
3.3V
NowallowVIN todroptoitsminimumvalue. Atlowerinput
voltages the operating frequency will decrease and the
P-channelwillbeconductingmostofthetime,causingthe
power dissipation to increase. At VIN(MIN) = 4.5V, the
frequency will decrease and the P-channel will be con-
ducting most of the time causing its power dissipation to
increase. At VIN(MIN) = 4.5V:
0V
LTC1147 • F06
Figure 6b. Burst Mode Operation CT Waveform
If Pin 2 is observed falling to ground at high output
currents,itindicatespoordecouplingorimproperground-
ing. Refer to the Board Layout Checklist.
sn1147 1147fds
12
LTC1147-3.3
LTC1147-5/LTC1147L
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APPLICATIO S I FOR ATIO
Board Layout Checklist
3. AretheSENSE– andSENSE+leadsroutedtogetherwith
minimum PC trace spacing? The 1000pF capacitor
between Pins 4 and 5 should be as close as possible to
the LTC1147.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1147 series. These items are also illustrated graphi-
cally in the layout diagram of Figure 7. Check the following
in your layout:
4. Does the (+) plate of CIN connect to the source of the
P-channelMOSFETascloselyaspossible?Thiscapaci-
tor provides the AC current to the P-channel MOSFET.
1. Are the signal and power grounds segregated? The
LTC1147 ground (Pin 7) must return separately to a)
the power and b) signal grounds. The power ground
(a) returns to the source anode of the Schottky diode
5. Is the input decoupling capacitor (0.1µF/1µF) con-
nected closely between VIN (Pin 1) and ground (Pin 7)?
ThiscapacitorcarriestheMOSFETdriverpeakcurrents.
and (–) plate of C , which should have lead lengths
as short as possible. The signal ground (b) connects
IN
6. On fixed output versions, is the SHDN (Pin 6) actively
pulled to ground during normal operation? The SHDN
pin is high impedance and must not be allowed to float.
to the (–) plate of C
.
OUT
2. Does the LTC1147 SENSE– (Pin 4) connect to a point
close to RSENSE and the (+) plate of COUT
?
BOLD LINES INDICATE HIGH CURRENT PATHS
P-CH
L
R
SENSE
+
+
+
+
V
IN
V
OUT
D1
C
IN
C
OUT
–
–
1µF
+
LTC1147-3.3
LTC1147-5
(LTC1147L)
1
2
3
4
8
7
6
5
PDRIVE
V
C
IN
R1
OUTPUT DIVIDER
REQUIRED WITH
ADJUSTABLE
R2
GND
T
100pF
SHDN
VERSION ONLY
I
TH
(V
)
FB
390pF
3300pF
1k
+
–
SENSE
SENSE
SHUTDOWN
1000pF
LTC1147 • F07
Figure 7. LTC1147 Layout Diagram (See Board Layout Checklist)
For additional High Efficiency application circuits see Application Note 54.
sn1147 1147fds
13
LTC1147-3.3
LTC1147-5/LTC1147L
U
TYPICAL APPLICATIO S
3.3V Low Dropout High Efficiency Regulator
V
IN
3.5V TO 12V
+
C
IN
47µF
Si9433DY
D1
16V
MBRS130LT3
0.1µF
L*
10µH
LTC1147L-3.3
PDRIVE
1
2
3
4
8
7
6
5
V
C
IN
T
GND
SHDN
SHUTDOWN
I
TH
C
C
C
3300pF
T
C
OUT
120pF
+
–
SENSE
SENSE
100µF
10V
AVX
R
C
+
1k
R
**
0.01µF
SENSE
0.068Ω
V
OUT
3.3V/1.25A
*SUMIDA CDR74B-100LC
LTC1147 • F08
**IRC LRC-LR2010-01-R068-F
Precision Constant Current Source
V
IN
10V TO 14V
+
C
IN
IOUT vs VOUT For Figure 9
Si3455DV
D1
33µF
1.0
0.8
0.6
0.4
0.2
0
0.1µF
MBRS130LT3
25V
V
= 12.6V
IN
L*
220µH
LTC1147L
1
8
PDRIVE
V
C
IN
T
2
3
4
7
GND
C
100pF
T
R1
1.2k
SHDN
(V
6
5
300pF
I
TH
)
FB
C
C
C
OUT
3300pF
+
–
SENSE
SENSE
100µF
16V
R
C
+
1k
R2
6.8k
AVX
R
**
0.01µF
SENSE
0.22Ω
0
2
4
6
8
10
V
(V)
OUT
V
OUT
LTC1147 F10
*SUMIDA CDR74-221
**IRC LRC-LR2010-01-R068-F
LTC1147 • F09
sn1147 1147fds
14
LTC1147-3.3
LTC1147-5/LTC1147L
U
TYPICAL APPLICATIO S
2.5V/2A Regulator
V
IN
3.5V TO 12V
+
C
IN
15µF
D1
MBRD330
Si9433DY
25V × 2
0.1µF
L*
10µH
LTC1147L
1
8
7
PDRIVE
V
C
IN
2
3
4
GND
T
R1
I00pF
6
49.9k
1%
SHDN
I
TH
(V
)
FB
C
C
T
C
C
OUT
5
120pF
3300pF
+
–
SENSE
SENSE
220µF
10V × 2
AVX
R
C
+
R2
49.9k
1%
1k
R
**
0.01µF
SENSE
0.05Ω
2.5V/2A
*COILTRONICS CTX10-4
**IRC LR2512-01-0R050-G
LTC1147 • F11
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.325
(7.620 – 8.255)
0.045 – 0.065
(1.143 – 1.651)
8
1
7
6
5
0.065
(1.651)
TYP
0.255 ± 0.015*
(6.477 ± 0.381)
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.035
–0.015
2
4
3
0.325
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
+0.889
8.255
(
)
(0.457 ± 0.076)
N8 1197
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
sn1147 1147fds
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1147-3.3
LTC1147-5/LTC1147L
U
TYPICAL APPLICATION
3.3V/2A Output High Efficiency Regulator
V
IN
4V TO 14V
+
C
IN
22µF
Si4431DY
0.1µF
25V × 2
L*
20µH
D1
MBRS130LT3
1
2
3
8
7
6
5
PDRIVE
GND
V
C
IN
T
LTC1147-3.3
SHDN
SHUTDOWN
I
TH
C
C
C
C
OUT
T
4
220µF
10V
220pF
3300pF
+
–
SENSE
0.01µF
SENSE
R
C
1k
+
AVX
R
**
SENSE
0.05Ω
*COILTRONICS CTX20-4
**KRL SP-1/2-A1-OR050
V
OUT
LTC1147 • F12
3.3V/2A
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
SO8 0996
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
3
4
2
RELATED PARTS
PART NUMBER
LTC1142
LTC1143
LTC1147
LTC1148
LTC1149
LTC1159
LTC1174
LTC1265
LTC1267
LTC1435
DESCRIPTION
COMMENTS
Dual High Efficiency Synchronous Step-Down Switching Regulator
Dual High Efficiency Step-Down Switching Regulator Controller
High Efficiency Step-Down Switching Regulator Controller
High Efficiency Step-Down Switching Regulator Controller
High Efficiency Step-Down Switching Regulator
Dual Version of LTC1148
Dual Version of LTC1147
Nonsynchronous, 8-Lead, V ≤ 16V
IN
Synchronous, V ≤ 20V
IN
Synchronous, V ≤ 48V, for Standard Threshold FETs
IN
High Efficiency Step-Down Switching Regulator
Synchronous, V ≤ 40V for Logic Level MOSFETS
IN
High Efficiency Step-Down and Inverting DC/DC Converter
High Efficiency Step-Down DC/DC Converter
0.5A Switch, V ≤ 18.5V, Comparator
IN
1.2A Switch, V ≤ 13V, Comparator
IN
Dual High Efficiency Synchronous Step-Down Switching Regulators
High Efficiency Low Noise Synchronous Step-Down Switching Regulator
Dual Version of LTC1159
16-Pin Narrow SO/SSOP; Constant Frequency
sn1147 1147fds
LT/TP 0698 REV D 2K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
LINEAR TECHNOLOGY CORPORATION 1993
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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